x86 Streaming SIMD Extensions
Hardware concept
Requires the CPU supports some version of SSE, an x86 architecture extension originally developed by Intel.
3
games
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SSE1 : Pentium III, Athlon XP
SSE2 : Pentium IV [2001], Pentium M, Celeron M, Atom, Efficeon, Nano, C7, Athlon 64 [2003]
SSE3 : Pentium IV [Presoctt, 2004], Pentium D, Celeron D, any Core CPUs, Atom, Efficeon, Nano, C7, Athlon 64 [rev. E, 2005]
SSSE3 : Core 2 [2007]
SSE4 : Core i7 [2010] and other Intel CPUs, very little support from other CPU designers (including AMD)
SSE5 : A proposed instruction set by AMD that was replaced by XOP, FMA4, and F16C/CVT16 instruction sets.
Assume later CPU models support the same SSE instructions if not more. Some budget CPUs like Celeron may not be consistent. SSE instruction support is incremental, so when a CPU supports SSE3 it supports the previous SSE versions too.
SSE2 : Pentium IV [2001], Pentium M, Celeron M, Atom, Efficeon, Nano, C7, Athlon 64 [2003]
SSE3 : Pentium IV [Presoctt, 2004], Pentium D, Celeron D, any Core CPUs, Atom, Efficeon, Nano, C7, Athlon 64 [rev. E, 2005]
SSSE3 : Core 2 [2007]
SSE4 : Core i7 [2010] and other Intel CPUs, very little support from other CPU designers (including AMD)
SSE5 : A proposed instruction set by AMD that was replaced by XOP, FMA4, and F16C/CVT16 instruction sets.
Assume later CPU models support the same SSE instructions if not more. Some budget CPUs like Celeron may not be consistent. SSE instruction support is incremental, so when a CPU supports SSE3 it supports the previous SSE versions too.
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Games by year
The first x86 Streaming SIMD Extensions video game was released on June 29, 2007.
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